The present invention relates to digital communications and, more particularly, to a synchronizer for a bit-error-rate tester.
A major objective of the present invention is to provide a bit-error-rate (BER) tester for testing communications links with different numbers of parallel lines. The main challenge proves to be developing a synchronizer for such a BER tester which is effective for all possible numbers of parallel lines being tested concurrently, up to the capacity of the tester.
A bit-error-rate tester can comprise a transmitter and a receiver, each with respective pseudorandom sequence generators. The receiver generator typically replicates the transmitter generator so as to be able to "predict" sequences received from it. The receiver generally includes comparators for comparing locally generated sequences with sequences received from the transmitter, so that the latter can be evaluated for errors. Preferably, each transmitted sequence is a pseudorandom bit sequence (PRBS).
A PRBS is a periodic binary sequence that shares the favorable statistical properties of true random number sequences needed for many simulation and testing approaches. For example, in a PRBS of order N, each possible N-bit binary sequence, other than a string of all zeroes, is represented in each cycle of the PRBS. This makes PRBS's useful in testing a system's performance under all possibIe input conditions.
A PRBS can be generated by a shift register with a feedback loop including a single exclusive-OR (XOR) gate. A shift register N-bits long suffices to generates a PRBS of order N and length L=2.sup.n -1. To maximize the generation rate of a PRBS, a number W of evenly staggered replicas of a single PRBS can be generated and then multiplexed to form the original PRBS at W times the bit rate of the individual streams. A generator with N parallel latches and W XOR gates suffices to generate W evenly staggered replicas of a PRBS sequence of order N, as suggested by John J. O'Reilly, "The Radio and Electronic Engineer", Vol. 45, No. 4, pp. 171-176, April 1975.
Traditionally, parallel PRBS have been generated to provide faster single PRBS. However, they can also be used to test parallel communications links and devices, such as multiplexers, with parallel inputs. In such applications, the parallel PRBS so generated constitute a pseudorandom word sequence (PRWS).
Synchronizers for serial PRBS transmissions are well known. For example, a received PRBS stream can be injected to fill a shift register, the feedback loop of which can then be closed so that the synchronizer can autonomously and synchronously generate the same PRBS sequence. A PRWS synchronizer can be synchronized by loading a one bit wide parallel word into a parallel latoh. See I. Rampaigul and J.J. O'Reilly, "Series-Parallel Bit-Error-Ratio Measurement For High Digit Rate Transmission Systems", paper presented at an International Conferenoe on Measurement for Telecommunication, 1985.
A bit error rate tester using the synchronization scheme with parallel latches is limited to fixed-word-width transmission. For example, if the generator is designed for a W-bit wide Nth order transmission, synchronization would only be possible where transmission was effected over W channels. The disadvantage is that the generator would have to be replaced or reconfigured each time a different number of parallel lines were to be tested.
Another problem with available parallel synchronizers is their inability to synchronize when the communications channels are crossed. This might occur in testing a demultiplexer. Alternatively, someone might simply select the wrong cable in completing a communications link.
It would be cost effective and practical to be able to use a single generator in a bit-error-rate tester and give the synchronizer the ability to synchronize irrespective of the number of communications channels being tested, up to the capacity of the generator to generate different-phased replicas of a given PRBS. In addition, it is desirable to be able to effect synchronization even where the parallel channels of a communications link are crossed. Accordingly, it is an object of the present invention to provide such a synchronizer.